At the Hot Chips 2026 conference, Intel presented architectural specifications for three hardware lines aimed at multi-step agentic AI workloads. The disclosure separates future data center infrastructure from client silicon that is already in market. While the Diamond Rapids server processor and Crescent Island inference GPU remain forward-looking designs, the third architecture—codenamed Wildcat Lake—has launched commercially as Intel Core Series 3 processors.
According to Intel chief technology officer Pushkar Ranade, the demands of agentic AI require tighter integration between general-purpose compute, specialized accelerators, advanced packaging, and open chiplet standards to fit real-world power and cost limits.
Split architectures across cloud and edge
Intel divides the computing tasks across high-performance host orchestration, air-cooled inference, and local edge processing. The table lists Intel's disclosed specifications.
| Architecture | Market tier | Key specifications | Interconnect and manufacturing |
|---|---|---|---|
Diamond Rapids | Server CPU orchestration | Up to 256 cores, 1.28 GB last-level cache, 128 lanes of PCIe Gen6 and CXL 3.0 | Intel 18A-P process, Foveros Direct 3D, UCIe-S |
Crescent Island | Data center AI inference | 32 Xe cores, 256 XMX engines (Xe3P), 350W PCIe card form factor | Intel Xe architecture |
Wildcat Lake (Core Series 3) | Client and edge SoC | 2 performance cores, 4 efficiency cores, integrated Xe3 graphics with XMX, 17 TOPS NPU, Wi-Fi 7, Bluetooth 6.0 | Intel 18A process, first Intel processor adopting UCIe |
Orchestration scale and inference economics
For data center host environments, Intel positions Diamond Rapids to handle complex agent orchestration. Built on the Intel 18A-P process, the processor incorporates new Advanced Performance Extensions (APX) and updated Advanced Matrix Extensions (AMX), alongside 128 lanes of PCIe Gen6 and Compute Express Link (CXL 3.0). Intel claims this layout and its 1.28 GB last-level cache deliver the high-bandwidth fabric required to coordinate external accelerators and sustain multi-agent tasks.
For execution throughput, the Crescent Island PCIe accelerator targets real-time inference within standard air-cooled data center facilities. Powered by Intel's Xe architecture with 32 Xe cores and 256 matrix engines based on Xe3P, the 350-watt board is intended to increase token throughput, sustain larger context windows, and serve concurrent agent sessions without requiring liquid cooling infrastructure.
At the client level, the shipping Wildcat Lake silicon brings agentic capabilities to mainstream laptops and edge devices. Fabricated on Intel 18A, the SoC pairs two performance cores and four efficiency cores with an integrated NPU delivering up to 17 TOPS for hybrid AI tasks. Intel also noted that Wildcat Lake marks its first commercial processor implementing the Universal Chiplet Interconnect Express (UCIe) standard in a multi-chip package.
Intel's presentation focused on hardware specifications and packaging mechanisms, without disclosing delivery schedules or commercial pricing for the unreleased Diamond Rapids and Crescent Island parts.